1. Field of the Invention
The present invention relates to a semiconductor device having a high breakdown voltage element and a low breakdown voltage element formed in a single substrate and a method of manufacturing the same.
2. Description of the Prior Art
Pn junction isolation and dielectric isolation are known as isolation techniques for semiconductor integrated circuits. Dielectric isolation is preferably employed to isolate a high breakdown voltage element used for large current switching from other elements so as to ensure reliable electrical isolation. When a high breakdown voltage element and a plurality of low breakdown voltage elements, such as bipolar transistors, constituting a control circuit for the high breakdown voltage element are integrated, dielectric isolation is preferably employed to prevent the low breakdown voltage elements from being electrically influenced by the high breakdown voltage element, e.g., prevent mixing of noise in the bipolar transistors due to large current switching. Generally, therefore, in a conventional integrated circuit using such dielectric isolation, a plurality of low breakdown voltage elements are respectively formed in different island regions isolated by a dielectric material in a substrate.
A structure wherein all the elements are isolated from each other by a dielectric material in such a manner is not preferable in terms of integration density, because dielectric isolation requires a larger area than pn junction isolation.
As described above, if the structure wherein all the elements are isolated by a dielectric material is employed in an integrated circuit having high and low breakdown voltage elements formed in a single substrate, an increase in integration density is limited.